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Taoxin Chuangke HK

  • image of Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)>VCK5000-AIE-ADK-P-G-ED
  • image of Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)>VCK5000-AIE-ADK-P-G-ED
VCK5000-AIE-ADK-P-G-ED
Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)
AMD Xilinx
EVAL VERSAL AI
-
Box
-
: 3207.53

1

3207.53

3207.53

image of Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)>VCK5000-AIE-ADK-P-G-ED
image of Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)>VCK5000-AIE-ADK-P-G-ED
VCK5000-AIE-ADK-P-G-ED
VCK5000-AIE-ADK-P-G-ED
Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)
AMD Xilinx
EVAL VERSAL AI
-
Box
-
TYPEDESCRIPTION
MfrAMD Xilinx
SeriesVersal® AI Core
PackageBox
Part StatusActive
TypeFPGA + MCU/MPU SoC
For Use With/Related ProductsXCVC1902
PlatformVersal ACAP VCK5000 Dev Card ED
ContentsBoard(s)
Interconnect System-
Suggested Programming EnvironmentVitis
NoteP/N Breakdown: ED = Encryption Disabled
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